1. Field of the Invention
Embodiments of the present invention generally relate to the fabrication of integrated circuits. More particularly, embodiments of the present invention relate to a method and apparatus for processing a substrate that includes depositing an oxide rich cap on a low dielectric constant film.
2. Description of the Related Art
Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore's Law), which means that the number of devices that will fit on a chip doubles every two years. Today's fabrication plants are routinely producing devices having 0.13 μm and even 0.1 μm feature sizes, and tomorrow's plants soon will be producing devices having even smaller geometries.
In order to further reduce the size of devices on integrated circuits, it has become necessary to use conductive materials having low resistivity and to use insulators having low dielectric constants (k<4) to reduce the capacitive coupling between adjacent metal lines. Recent developments in low dielectric constant films have focused on incorporating silicon (Si), carbon (C), and oxygen (O) atoms into the deposited films to form low dielectric constant organosilicate films.
The development of organosilicate films that have very low dielectric constants as well as desirable thermal and mechanical properties has been challenging. Often, films made of a Si, C, and O network that have a dielectric constant less than 2.5 exhibit poor mechanical strength and are easily damaged by subsequent substrate processing steps, such as chemical mechanical polishing, causing failure of the integrated circuit.
Plasma processes, such as plasma enhanced chemical vapor deposition (PECVD), are increasingly being used to replace thermal processes in the deposition of low dielectric constant films including silicon, carbon, and oxygen. However, one problem that has been encountered with plasma processing in integrated circuit fabrication is device damage that occurs as a result of exposure of a device to plasma conditions. It is believed that a non-uniform plasma environment may result in arcing or electric field gradients that lead to device damage.
While the susceptibility or degree of device damage typically depends at least partially on the stage of device fabrication and the type of device, many types and stages of devices can experience plasma-induced damage (PID). However, in particular, devices containing an insulating or dielectric layer deposited on a substrate are often susceptible to PID, as charges accumulate on the surface of the dielectric layer. Furthermore, as the size of device features is becoming smaller, dielectric layers are becoming thinner, and devices are becoming increasingly susceptible to PID.
Another undesirable characteristic of some low dielectric constant organosilicate films is high tensile stress. High tensile stress in a film can lead to film bowing or deformation, film cracking, film peeling, or the formation of voids in the film, which can damage or destroy a device that includes the film.
Thus, there remains a need for an improved method of depositing low dielectric constant films that minimizes plasma-induced damage and reduces tensile stress in the films.